1.1 Structure and Function of the processor Flashcards
1
Q
What is the CPU?
A
- responsible for processing all data in a computer
- made up of ALU, CU and special purpose registers
2
Q
What are registers?
A
- Temporary storage/memory locations inside the CPU which are used for a specific purpose.
- They have a faster access speed than RAM / secondary storage
3
Q
What is the arithmetic logic unit (ALU)?
A
- performs arithmetic calculations or logic comparisons
- Made up of several components:
- Arithmetic Circuit (carries out
arithmetic
- Logic circuit (carries out logic
comparisons)
-Additional Registers to store data
4
Q
What is the control unit (CU)?
A
- Where instructions are decoded
- Also controls the data in the CPU and how it moves around
5
Q
What is the program counter (PC)?
A
- stores the memory address of the next instruction to be fetched
6
Q
What is the accumulator (ACC)?
A
- where values are stored temporarily, either after they’ve been inputted or loaded, or after being calculated in the ALU
7
Q
What is the memory address register (MAR)?
A
- where addresses are stored either for where data is being sent in memory, or where it is being fetched from
8
Q
What is the Memory data register (MDR)?
A
- where data or instructions are stored, either before it is sent to memory or after being fetched
9
Q
What is the Current Instruction Register (CIR)?
A
- where instructions are loaded after being fetched from memory
- here it is split into opcode and operand before being decoded
10
Q
What are buses in the CPU?
A
- set of parallel wires that connect two or more components inside the CPU together
- width of the bus is the number of parallel wires it has
11
Q
What is the system bus?
A
- the collection of the Data, Address and control bus
12
Q
What is the address bus?
A
- uni-directional bus carries signals between the processor and Man Memory
- transmits memory addresses specifying where to read to or write from
13
Q
What is the data bus?
A
- bi-directional bus that carries data and instructiomns between components
14
Q
What is the control bus?
A
- bi-directional bus that carries control signals between internal and external components
15
Q
What are the control signals that the control bus send?
A
- Bus request: shows a device is requesting use of data bus
- Bus Grant: shows CPU granted access to data bus
- Memory Write: data on data bus written to addressed location
- Memory Read: data from addressed location placed on data bus
- Interrupt Reuest: indicates device is requesting access to CPU
- Clock: used to synchronise operations
16
Q
What is the fetch-decode-execute cycle?
A
- the sequence of operations completed in order to execute an instruction
17
Q
How are the components of the CPU used in each phase of the fetch-decode-execute cycle?
A
- Fetch Phase:
> Address from PC copied to MAR
> Instruction held at that address
copied into MDR by Data bus
> Program Counter Incremented
> Value held in MDR copied to CIR - Decode Phase:
> Contents of CIR split into opcode and
operand - Execute Phase:
> Opcode executed on the operand
18
Q
What factors affect CPU performance?
A
- Clock Speed: how many state changes the CPU performs per second. Higher the clock speed, the more instructions can be executed per second
- Number of cores: A core is a processing unit. A computer with multiple cores can complete more than one FDE cycle at any given time. Some programs not optimised for more than one core.
- Amount and type of cache Memory: Cache Memory is the CPU’s onboard memory. Instructions fetched from memory are copied to cache for quicker access if required again
19
Q
What are the types of cache memory?
A
- Level 1 cache: Very fast memory cell, but small amount of capacity. (2-64KB)
- Level 2 cache: Relatively fast memory cell, with medium sized capacity. (256KB-2MB)
- Level 3 cache: Much larger and slower memory cell
20
Q
What is Von Neumann architecture?
A
- computer architecture that includes a single control unit, ALU, registers and memory units
- shared memory and data bus used for both data and instructions
21
Q
Advantages of von Neumann architecture
A
- cheaper to develop since the control unit is easier to design
- programs can be optimised in size
22
Q
What is Harvard Architecture?
A
- physically seperate memories for instructions and data
- most commonly used with embedded processors
23
Q
Advantages of Harvard Architecture
A
- Quicker since data and instructions can be fetched in parallel
- Both memories can be different sizes
24
Q
What is contemporary processing?
A
- combination of Harvard and Von Neumann architecture
- Uses Von Neumann when working with the data and instructions in main memory
- Uses Harvard when working with cache
- there is an instruction cache and data cache
25
Q
What is pipelining?
A
- the process of completing the fetch, decode and execute cycles of three seperate instructions simultaneously
- data is held in a buffer in close proximity to the CPU until it’s required
- aimed to reduce the amount of the CPU which is kept idle
