1.1 Architecture Flashcards
Memory
Stores data and instructions currently in use
CPU
Processes data and executes instructions
Program counter
Holds address of the next instruction
Memory address register
Stores the address of the instructed that is currently getting fetched
Memory data register
Holds data that has already been fetched from main memory
Accumulator
Holds results of calculations
Control unit
Decides instructions and sends signals to control the CPU
Address bus
From the MAR to RAM
Data bus
from RAM to the MDR
Cache
Fast access memory to frequently used data without going back to RAM
Fetch
Program counter checked
Passes to MAR
MAR fetched from main memory via address bus
Data bus returns to MDR
program counter increments by one
Decode
CU decodes data/instructions
Execute
Depending on the instruction the CPU:
Fetches data for calculation(ALU-ACC)
Jump to another instruction out of sequence
Write data in ACC back to main memory
What factors affect performance of the CPU
Clock speed, number of cores, cache size
Clock speed
Amount of FDE cycles per second(Hz)