1,1 system arch Flashcards

1
Q

The fetch-decode-execute cycle (7)

A

1- The memory address held in the program counter is copied into the MAR.
2- The address in the program counter is then incremented (increased) by one. The program counter now holds the address of the next instruction to be fetched.
3- The processor sends a signal along the address bus to the memory address held in the MAR.
4- The instruction/data held in that memory address is sent along the data bus to the MDR.
6- The instruction/data held in the MDR is decoded and then executed. Results of processing are stored in the ACC.
7- The cycle then returns to step one.

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