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COSC 2406 Assembly Language Programming > 02 - X86 Processor Architecture > Flashcards

02 - X86 Processor Architecture Flashcards

1
Q

What is ROM?

A

Read only memory

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2
Q

What is EPROM

A

Erasable programmable read-only memory

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3
Q

What is Dynamic RAM (DRAM)

A

inexpensive; must be refreshed constantly

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4
Q

Static RAM (SRAM)

A

expensive; used for cache memory; no refresh required

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5
Q

Video RAM (VRAM)

A

dual ported; optimized for constant video refresh

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6
Q

What are the 3 levels of input-out

A

Level 3: High-level language function
Level 2: Operating System
Level 1: BIOS

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7
Q

What are the steps taken when an HLL program displays a string of characters

A

Application Program Level 3
OS Function Level 2
BIOS Function Level 1
Hardware Level 0

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8
Q

At what programming levels can assembly perform input and output

A

Assembly can perform input and output at each of the 4 levels:
Library
OS function
BIOS Function
Hardware
L3
-
L0

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9
Q

What is responsible for synchronizing CPU operations

A

The clock

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10
Q

What is the control unit responsible for (CU)

A

Coordinates sequence of execution steps

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11
Q

What does the ALU do?

A

Performs arithmetic and bitwise processing

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12
Q

Name some features of the clock

A

Synchronizes all CPU and BUS operations
Machine (clock) cycle measures time of a single operation
Clock is used to trigger events

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13
Q

Name the steps of the Instruction Execution Cycle

A
  • Fetch Instruction
  • Decode
  • Fetch operands
  • Execute
  • Store output
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14
Q

Does memory respond more slowly than the CPU?

A

Yes

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15
Q

How does reading from memory work

A
  1. Place the address of the value you want to read on the address bus
  2. Assert (changing the value of) the processor’s RD (read) pin
  3. Wait one clock cycle for the memory chips to respond
  4. Copy the data from the data bus into the destination operand
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16
Q

What is Cache memory

A

High-speed expensive static RAM both inside and outside the CPU

Level 1 cache: inside the CPU
Level 2 cache: outside the CPU

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17
Q

What is a cache hit

A

When data to be read is already in cache memory (good thing)

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18
Q

What is a cache miss

A

When data to be read is not in cache memory (very expensive thing)

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19
Q

What are some of the Modes of Operation

A

Protected Mode (Window, Linux, etc.)

Real-address mode (native MS-DOS)

System management mode (power management, system security, diagnostics)

Virtual-8086 mode
hybrid of protected, each program has its own 8086 computer

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20
Q

General purpose registers

A
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21
Q

Name the 32-bit General-Purpose Registers

A

EAX - accumulator
EBX - extended frame pointer (stack)
ECX - loop counter
EDX -

EBP - registers
ESP - stack pointer
ESI - extended source index
EDI - extended destination index

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22
Q

Name the 16-bit Segment Registers

A

CS - Code segment
SS - Stack segment
DS - Data segment
ES - additional segments
FS - additional segments
GS - additional segments

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23
Q

Explain EAX, EBX, ECX, EDX naming and structure

A

Each 2 letter combination can be further broken down into 2 separate 2 letter combinations. AX (16 bits) becomes AH (8 bit), and AL (8 bit).

Each 2 letter combination has the letter E as a prefix to represent extended, EAX (32 bits). So the hierarchy in size is

AH, AL (8 bit) 8 bit name
AX, (16 bit) 16 bit name
EAX (32 bit) 32 bit name

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24
Q

Which registers have only a 16-bit name for their lower half

A

32-bit name
ESI
EDI
EBP
ESP

16-bit name
SI
DI
BP
SP

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25
Q

Name the specialized register uses

A

General Purpose
EAX - accumulator
ECX - loop counter
ESP - stack pointer
ESI, EDI - index registers (source and destination)
EBP - extended frame pointer (stack)

Segment
CS - code segment
DS - data segment
SS - stack segment
ES, FS, GS - additional segments

EIP - instruction pointer
EFLAGS - status and control flags (each flag is a single binary bit)

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26
Q

What are some status flags

A

Carry - unsigned arithmetic out of range
Overflow - signed arithmetic out of range
Sign - result is negative
Zero - result is zero
Auxiliary Carry - carry from bit 3 to bit 4
Parity - sum of 1 bits is an even number

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27
Q

How many registers are there for 80-bit floating-point data

A

8, ST(0) … ST(7)
Arranged in a stack

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28
Q

How many registers are there for 64-bit MMX registers

A

8

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29
Q

How many registers are there for 128-bit XMM registers for single-instruction multiple-data (SIMD) operations

A

8

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30
Q

How many bits is an address in basic 64-bit execution environment (in practice), and what could it also be

A

48 bits in practice since this is what processors can currently support , can be 64 bits theoretically

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31
Q

How many registers in the Basic Execution Environment

A

16 64-bit general purpose registers

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32
Q

What is the instruction pointer called in the Basic Execution Environment and how many bits is it

A

64 instruction pointer named RIP

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33
Q

32-64 Bit General Purpose Register breakdown

A

32-bit general purpose registers:
EAX, EBX, ECX, EDX, EDI, ESI, EBP, ESP, R8D, R9D, R10D, R11D, R12D, R13D, R14D, R15D

64-bit general purpose registers:
RAX, RBX, RCX, RDX, RDI, RSI, RBP, RSP, R8, R9, R10, R11, R12, R13, R14, R15

34
Q

What is the basic unit of time for machine instsructions?

A

Machine cycle / clock cycle)

35
Q

What is the function of the memory storage unit

A

Holds instructions and data while a program is running. The storage unit receives requests for data from the CPU, transfers data from RAM to the CPU, and transfers data from the CPU into memory

36
Q

Where does all the processing of data take place

A

Within the CPU, so all programs residing in memory must be copied into the CPU before they can execute

37
Q

Can instructions be sent both individually and in a group to the CPU

A

Yes

38
Q

What is a bus

A

A bus is a parallel transfer path that moves data from one part of a computer to another. A computer system usually contains four bus types

39
Q

What are the 4 different types of busses

A

Data bus, Input/output bus, control bus and address bas

40
Q

What does the data bus do

A

Transfers instructions and data between the CPU and memory

41
Q

What does the I/O bus do

A

Transfers data between the CPU and the system I/O devices

42
Q

What does the control bus do

A

Uses binary signals to synchronize actions of all devices attached to the system bus

43
Q

What does the address bus do

A

Hold the addresses of instructions and data when the currently executing instruction transfers data between the CPU and memory

44
Q

What are the steps of the Instruction Execution Cycle

A
  1. CPU has to fetch the instruction from an area of memory called the instruction queue. After this it increments the instruction pointer
  2. The CPU decodes the instruction by looking at its binary bit pattern. This bit pattern might reveal that the instruction has operands (input values)
  3. If operands are involved, the CPU fetches the operands from registers (faster) and memory (slower). Sometimes, this involves address calculations.
  4. Next, the CPU executes the instruction, using any operand values it fetched during the earlier step. It also updates a few status flags, such as Zero, Carry, and Overflow
  5. Finally if an output operand was part of the instruction, the CPU stores the result of its execution in the operand
45
Q

What are the three basic steps of the Instruction Execution Cycle

A

Fetch, Decode and Execute

46
Q

Where is code place by memory

A

The code cache

47
Q

What is the purpose of a cache

A

To hold frequently accessed memory which allows for high speed access

48
Q

What is the benefit of a cache in relation to look ahead

A

When a CPU begins to execute a program it can look ahead and load the next thousand instructions into cache on the assumption that these instructions will be needed fairly soon.

49
Q

Where is level 1 cache stored

A

In the CPU

50
Q

Where is level 2 cache stored

A

Attached to the CPU by a high speed data bus

51
Q

Which is much faster? Cache memory or conventional RAM

A

Cache memory, because cache memory is constructed from static RAM (SRAM) which means it does not need to be constantly refreshed in comparison to the dynamic ram (DRAM)

52
Q

Where must a program be loaded before it can run

A

In the program loader, where it then must point the CPU to the program’s entry point which is the address at which the program is to begin execution

53
Q

Give the steps of loading and executing a program

A
  • The operating system (OS) searches for the program’s filename in
    the current disk directory. If it cannot find the name there, it searches
    a predetermined list of directories (called paths) for the filename. If
    the OS fails to find the program filename, it issues an error message.
  • If the program file is found, the OS retrieves basic information about
    the program’s file from the disk directory, including the file size and
    its physical location on the disk drive.
  • The OS determines the next available location in memory and loads
    the program file into memory. It allocates a block of memory to the
    program and enters information about the program’s size and
    location into a table (sometimes called a descriptor table).
    Additionally, the OS may adjust the values of pointers within the
    program so they contain addresses of program data.
  • The OS begins execution of the program’s first machine instruction
    (its entry point). As soon as the program begins running, it is called a
    process . The OS assigns the process an identification number
    (process ID ), which is used to keep track of it while running.
  • The process runs by itself. It is the OS’s job to track the execution of
    the process and to respond to requests for system resources.
    Examples of resources are memory, disk files, and I/O devices.

When the process ends, it is removed from memory.

54
Q

How many GBs is the linear address space a 32-bit processor can address in protected mode

A

4 GB

Extended Physical addressing allows a total of 64 GByte of physical memory to be addressed

55
Q

How large is the range of real-address mode program

A

1 MByte

56
Q

What is a register

A

A high-speed storage location directly inside the CPU

57
Q

What are general-purpose registers primarily used for

A

Arithmetic and data movement

58
Q

What is EAX used for

A

automatically used by multiplication and division instructions, It is often called the extended accumulator register

59
Q

What is ECX used for

A

Loop counter

60
Q

What is ESP used for

A

Addresses data on the stack (a system memory structure). Often called the extended stack pointer register

61
Q

What are ESI and EDI used for

A

used by high-speed memory transfer instructions. They are sometime called the extended source index and extended destination index registers

62
Q

What is EBP used for

A

Use by high-level languages to reference function parameters and local variables on the stack. It should not be used for ordinary arithmetic or data transfer except at an advanced level of programming. Extended frame pointer register

63
Q

What do segment registers hold pointers to

A

Segment registers hold pointers to segment descriptor tables. Some segments hold program instructions others hold variables (data). Stack segment holds local function variables and function parameters

64
Q

What is EIP used for

A

The instruction pointer register contains the address of the next instruction to be executed. Certain machine instructions manipulate EIP, causing the program to branch to a new location

65
Q

What does the EFLAGS register do

A

Consists of individual binary bits that control the operation of the CPU or reflect the outcome of some CPU operation. Flag is set when it equals 1 and is clear (or reset) when it equals 0

66
Q

What are the 2 types of flags

A

Control flags and status flags

67
Q

What are control flags responsible for

A

Control the CPU’ operations

68
Q

What are status flags responsible for

A

Reflect the outcomes of arithmetic and logical operation performed by the CPU: Carry, Overflow, Sign, Zero, Auxiliary Carry, Parity

69
Q

What does MMX technology do

A

Improves the performance of Intel Processors when implementing advanced multimedia and communications applications.

70
Q

What do the eight 64-bit MMX registers support

A

Special instructions called SIMD (Single Instruction, Multiple Data). MMX instructions operate in parallel on the data values contained in MMX registers. Although they appear to be separate registers, the MMX register names are in fact aliases to the same registers used by the floating point unit.

71
Q

What does Floating-point unit do (FPU)

A

Preforms high-speed floating point arithmetic. Is integrated into the main processor chip

72
Q

What is the range in real-address mode

A

Hexadecimal 00000 to FFFFF

73
Q

How many programs can a processor run at a time in each operation mode

A

Real-address mode
Only one but it can momentarily interrupt that program to process requests (called interrupts) from peripherals)

Protected mode
The processor can run multiple programs at the same time, it assigns each process (running program) a total of 4Gbyte of memory.

74
Q

Which of RFLAGS bits are not used

A

The upper 32 bits

75
Q

Are the status flags the same in 32-bit mode and 64-bit mode

A

Yes

76
Q

What are the traditional components found on PC motherboards

A
  • A CPU socket
  • Memory slots
  • BIOS (Basic Input Output system)
  • CMOS RAM with a small circular battery to keep it powered
  • Connectors for mass-storage devices such as hard drives and CD-ROMs
  • USB connectors for external devices
  • Keyboard and mouse poerts
  • PCI bus connectors for sound cards, graphics cards, data acquisition boards and other I/O devices

Optional:
Integrated sound processor
- Parallel and serial device connectors
- Integrated network adapter
- AGP bus connector for a high-speed video card

77
Q

Difference between SIMM and DIMM

A

(SIMM (Single in line memory module) or DIMM (dual in memory line module)
DIMM supports 64 bit channel, SIMM supports 32 bit channel,
DIMM > SIMM
https://www.geeksforgeeks.org/difference-between-simm-and-dimm/

78
Q

What is the PCI Express

A

The PCI Express bus provides two-way serial connections between devices, memory, and the processor. It carries data in packets, similar to networks, in separate “lanes”. Widely supported by graphics controllers and has been used for many years

79
Q

Name the different types of memory

A
  • ROM is permanently burned into a chip and cannot be erased
  • EPROM can be erased slowly with ultraviolet light and reprogrammed
    -DRAM commonly known as main memory, is where programs and data are kept when a program is running.
  • SRAM expensive, high speed cache memory, CPU cache memory uses SRAM
  • VRAM hold video data, dual ported to allow for constant refresh
80
Q
A

COSC 2406 Assembly Language Programming (3 decks)

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