Exam 1 Flashcards

1
Q

2^10

A

Kilo

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2
Q

2^20

A

Mega

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3
Q

2^30

A

Giga

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4
Q

2^40

A

Tera

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5
Q

2^50

A

Peta

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6
Q

2^60

A

Exa

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7
Q

2^70

A

Zetta

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8
Q

2^80

A

Yotta

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9
Q

What is a word

A

a collection of bits (101-three bit word)

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10
Q

What is a bit

A

one digit. (100110-6 bits)

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11
Q

What is a byte

A

8 bits

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12
Q

Kilobyte

A

1000 bytes

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13
Q

2^12 = ?

A

4k

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14
Q

2^26

A

64M

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15
Q

2^54

A

16P

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16
Q

2^32

A

4G

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17
Q

2^65

A

32E

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18
Q

True or Flase, ARM does not manufacture microcontrollers. It only licenses its processor design to other chip manufacturers.

A

True

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19
Q

In the Harvard bus architecture, data and instructions travel across the microcontroller

A

On their own buses

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20
Q

The Cortex-M3 and the Cortex-M4 implement the _______ bus architecture.

A

Harvard

21
Q

The width of registers on the Cortex-M3 and the Cortex-M4 is _____ bits.

A

32

22
Q

Using Thumb instructions in your program can provide _____ code density (meaning your program will take up _____ space in ROM memory).

A

Higher, Less

23
Q

Registers R0-R7 are defined as the _____ general purpose registers.

A

Low

24
Q

In the Cortex-M3 and the Cortex-M4 register number _____ is reserved as the link register. (provide a numerical number)

A

14

25
Q

The _____ flag indicates overflow for unsigned numbers.

A

C (carry)

26
Q

In general, the SRAM is where variables defined by your program would reside.

A

True

27
Q

On the Cortex-M3 and the Cortex-M4 the code memory block starts at address location 0x0000.0000.

A

True

28
Q

On the Cortex-MF4 processor, a half-word is _____ bits long.

A

16

29
Q

The number of bits in a byte is machine-dependent.

A

False

30
Q

What is the value of the V condition code/flag after the following instructions are executed?
(Assume that all condition codes are 0 before the instructions are executed.)

MOV32 R3, #0x80000000
SUBS R0, R3, #1

A

1

31
Q

In the Cortex-M3 and the Cortex-M4 register number _____ is reserved for the program counter. (provide a numerical number)

A

15

32
Q

In the Cortex-M3 and the Cortex-M4 register number _____ is reserved for the stack pointer. (provide a numerical number)

A

13

33
Q

Both 16-bit and 32-bit instructions are included in the Thumb2 instruction set.

A

True

34
Q

A label preceding an assembly instruction is _______ and can be used to determine the memory address of an instruction in ROM.

A

Optional

35
Q

It is possible for an ADD instruction to have only 2 operands. (e.g., ADD R3, R1)

A

True

36
Q

To move data to a register from RAM or ROM, the _____ instruction is used.

A

Load

37
Q

The instruction “B name1” performs a(n) _______ jump/branch to the program label “name1.”LD

A

unconditional

38
Q

The _____ directive creates a new code or data section.

A

Area

39
Q

The assembler directives are executed during the assembling process at compilation time, not at runtime (when your programming is running).

A

True

40
Q

Write a single line of assembly code using the EQU directive to equate the label HAT with the number 0xF6.

A

HAT EQU 0xF6

41
Q

Two attributes of secondary memory are… (compared to primary memory)

A

High Access time, relatively large amount of space.

42
Q

ARM Holdings designs processors but does not manufacture them.

A

True

43
Q

Which of the following factors should be taken into account when designing an embedded system? (select all that apply)

system size and weight
speed of execution
performance accuracy
power consumption

A

system size and weight speed of execution performance accuracy power consumption

44
Q

Addresses are passed to devices outside of the core processor via the _____ bus.

A

Address

45
Q

_____ RAM is the most commonly used type of RAM.

static
dynamic

A

dynamic

46
Q

_____ RAM requires refreshing of the data because the stored charge is lost over time.

A

Dynamic

47
Q

Every program instruction has an associated operation (e.g., subtract, read, write, logical AND, compare) that has a unique code telling the processor what action to take. That unique code is called a(n) _____.

A

Opcode

48
Q

Using a CISC processor makes sense when the memory system is much slower than the processor.

A

True

49
Q

Which of the following memory devices are examples of ROM? (select all correct answers)

Static RAM
(Electrically Erasable PROM)
Flash Memory
Erasable PROM
Dynamic RAM
Programmable ROM

A

Electrically Erasable
PROM, Flash Memory, Erasable PROM, Programmable ROM